On 19th April, Prof. David Atienza (École Polytechnique Fédérale de Lausanne) gave a keynote speech at 2021 IEEE Latin America Electron Devices Conference (LAEDC) with the title “Energy-Scalable Many-Core Servers: Follow Your Brain!”
The keynote referred to the continuous advances in manufacturing technologies that are enabling the development of more powerful and compact high-performance servers made of many-core processing architectures and stacked memories. However, this soaring demand for computing power in the last years has grown faster than semiconductor technology evolution can sustain. Thus, it has produced as collateral undesirable effect a surge in power consumption and heat density in these new many-core servers, which results in significant performance degradation. In this talk, Prof. Atienza will advocate to completely revise the current practices to design high-performance server architectures targeting the next generation of Deep Learning algorithms (particularly in the domains of personalized health and Big Data analytics). In particular, inspired by the mammalian brain, it is proposed a new disruptive three-dimensional (3D) computing server architecture that jointly provides power and cooling using a single microfluidic medium to overcomes the prevailing worst-case provisioning paradigm for servers. Also, this new 3D server design champions a new system-level thermal modeling and machine learning-based task assignment, which can be used by novel proactive energy controllers for detailed heat and energy management in many-core servers, thanks to dynamic adaptation of the micro-scale liquid cooling flow. Then, the positive impact of new memory technologies for efficient computing on many-core servers will be shown. Finally, it will be explained how we can integrate new on-chip microfluidic fuel cell networks to enable energy-scalability in future generations of many-core servers targeting the design of the next generation of Exascale computing, thanks to the new PowerCool and Gem5-X open-source multi-core architectural simulators.
Biography of the Keynote Speaker – Prof. David Atienza (EPFL): David Atienza is an Associate Professor of Electrical and Computer Engineering and leads the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in Computer Science and Engineering from UCM (Spain) and IMEC (Belgium). His research interests focus on system-level design methodologies for energy-efficient multi-processor system-on-chip architectures (MPSoC) targeting the next-generation of servers and edge AI systems (particularly wearables) for the Internet of Things (IoT) era. In these fields, he is co-author of more than 350 publications, twelve patents, and has received several best paper awards in top conferences. He also was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. Dr. Atienza has received the DAC Under-40 Innovators Award in 2018, IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He is an IEEE Fellow and an ACM Distinguished Member.